Protocol
CXL
Compute Express Link
Lab ready Full lab
Compute Express Link — a cache-coherent interconnect riding PCIe PHY for memory expanders and accelerators. .io, .cache, and .mem protocols attach devices with varying coherency. It aims to compose memory and accelerators beyond classic PCIe endpoints.
Tags
coherentmemoryacceleratorpcie-phy
Sources
- CXL Specification (CXL Consortium)
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